GCVE - cpe:2.3:h:intel:core_i5_m480:-:*:*:*:*:*:*:*

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cpe:2.3:h:intel:core_i5_m480:-:*:*:*:*:*:*:*

part: h version: - update: *

Vendor	Intel (`929cab12-ac81-57b7-8a87-14c6f331cefb`)
Product	Core I5 M480 (`7d900081-dc78-5490-9af5-b5b6403124fe`)
Edition	*
Language	*
Software edition	*
Target software	*
Target hardware	*
Other	*
Notes	Imported from NVD CPE 2.0 feed

PURL mappings

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Vulnerability references

Identifier	cpeApplicability	Submitted	db.gcve.eu details	Rationale
`CVE:CVE-2021-33107`	not_vulnerable	2026-06-08 05:32:09.552740	Details available Insufficiently protected credentials in USB provisioning for Intel(R) AMT SDK before version 16.0.3, Intel(R) SCS before version 12.2 and Intel(R) MEBx before versions 11.0.0.0012, 12.0.0.0011, 14.0.0.0004 and 15.0.0.0004 may allow an unauthenticated user to potentially enable information disclosure via physical access. Published: 2022-02-09T22:04:36.000Z Updated: 2025-05-05T16:50:44.562Z Open on db.gcve.eu Reference links https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00575.html https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00601.html	Imported from gcve-enriched-dumps CVE data
`CVE:CVE-2017-5927`	vulnerable	2026-06-08 05:09:50.113962	Details available Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern ARM processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR. Published: 2017-02-27T07:25:00.000Z Updated: 2024-08-05T15:18:48.841Z Open on db.gcve.eu Reference links http://www.cs.vu.nl/~herbertb/download/papers/anc_ndss17.pdf https://www.vusec.net/projects/anc http://www.securityfocus.com/bid/96459	Imported from gcve-enriched-dumps CVE data
`CVE:CVE-2017-5926`	vulnerable	2026-06-08 05:09:50.113145	Details available Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern AMD processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR. Published: 2017-02-27T07:25:00.000Z Updated: 2024-08-05T15:18:48.777Z Open on db.gcve.eu Reference links http://www.cs.vu.nl/~herbertb/download/papers/anc_ndss17.pdf http://www.securityfocus.com/bid/96457 https://www.vusec.net/projects/anc	Imported from gcve-enriched-dumps CVE data
`CVE:CVE-2017-5925`	vulnerable	2026-06-08 05:09:50.107143	Details available Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern Intel processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR. Published: 2017-02-27T07:25:00.000Z Updated: 2024-08-05T15:18:48.768Z Open on db.gcve.eu Reference links http://www.securityfocus.com/bid/96452 http://www.cs.vu.nl/~herbertb/download/papers/anc_ndss17.pdf https://www.vusec.net/projects/anc	Imported from gcve-enriched-dumps CVE data

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