Virtex Ii Pro Fpga
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cpe:2.3:h:xilinx:virtex-ii_pro_fpga:*:*:*:*:*:*:*:*
part: h version: * update: *
| Vendor | Xilinx (052b85b7-5ee0-58fa-a00f-77291dc19cec) |
|---|---|
| Product | Virtex Ii Pro Fpga (c4f19c78-6c0b-54cc-854b-bd2049d0ac35) |
| Edition | * |
| Language | * |
| Software edition | * |
| Target software | * |
| Target hardware | * |
| Other | * |
| Notes | Imported from gcve-enriched-dumps CVE data |
PURL mappings
| PURL | Source | Last updated |
|---|---|---|
| No PURL mappings for this CPE yet. | ||
Vulnerability references
| Identifier | cpeApplicability | Submitted | db.gcve.eu details | Rationale |
|---|---|---|---|---|
CVE:CVE-2010-0928 |
not_vulnerable | 2026-06-08 04:54:04.105174 |
Details available
OpenSSL 0.9.8i on the Gaisler Research LEON3 SoC on the Xilinx Virtex-II Pro FPGA uses a Fixed Width Exponentiation (FWE) algorithm for certain signature calculations, and does not verify the signature before providing it to a caller, which makes it easier for physically proximate attackers to determine the private key via a modified supply voltage for the microprocessor, related to a "fault-based attack."
Published: 2010-03-05T19:00:00.000Z
Updated: 2024-08-07T01:06:52.376Z Reference links
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Imported from gcve-enriched-dumps CVE data |
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