Neoverse V3
Approved changes feed: RSS · Atom
cpe:2.3:a:arm:neoverse-v3:*:*:*:*:*:*:*:*
part: a version: * update: *
| Vendor | Arm (992f6a5c-1bc7-5785-a659-421ca2a38af9) |
|---|---|
| Product | Neoverse V3 (bde373fe-c88b-5475-979b-8b147f5bfa6e) |
| Edition | * |
| Language | * |
| Software edition | * |
| Target software | * |
| Target hardware | * |
| Other | * |
| Notes | Imported from gcve-enriched-dumps CVE data |
PURL mappings
| PURL | Source | Last updated |
|---|---|---|
| No PURL mappings for this CPE yet. | ||
Vulnerability references
| Identifier | cpeApplicability | Submitted | db.gcve.eu details | Rationale |
|---|---|---|---|---|
CVE:CVE-2025-0647 |
vulnerable | 2026-06-08 07:02:25.021936 |
Details available
In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this case, the PE may retain stale TLB entries which should have been invalidated by the TLBI.
Published: 2026-01-14T10:58:44.342Z
Updated: 2026-01-20T15:21:14.551Z Reference links |
Imported from gcve-enriched-dumps CVE data |
Contribute
You can submit an edit proposal for this CPE entry or suggest a related product/vendor addition using the action button above.